Avicena is showing ultra-fast microLED links operating at 14Gbps per lane as part of its LightBundleTM multi-Terabit interconnect technology
MOUNTAIN VIEW, Calif. & BASEL, Switzerland–(BUSINESS WIRE)–#innovation–Avicena, a privately held company in Mountain View, CA, is demonstrating its LightBundleTM multi-Tbps chip-to-chip interconnect technology at the European Conference for Optical Communications (ECOC) 2022 in Basel, Switzerland (https://www.ecocexhibition.com/).
Interconnects have become the key bottleneck in modern compute and networking systems. Highly variable workloads are driving the evolution of densely interconnected, heterogeneous, software-defined clusters of XPUs, Smart NICs, hardware accelerators, and high-performance shared memory. Ever growing Artificial Intelligence (AI)/Machine Learning (ML) and High-Performance Computing (HPC) workloads are driving the need for interconnects with ultra-high bandwidth density, ultra-low power consumption, and low latency.
“We have already demonstrated LightBundleTM links running at less than 1pJ/bit,” says Bardia Pezeshki, founder and CEO of Avicena, “Here at ECOC 2022 we are demonstrating individual microLED links running at 14Gbps. Compact, low-cost interconnects using hundreds of these links can support many terabits per second.” LightBundleTM is based on arrays of innovative GaN microLEDs that leverage the microLED display ecosystem and can be integrated directly onto high performance CMOS ICs. Each microLED array is connected via a multi-core fiber cable to a matching array of CMOS-compatible PDs.
“We have just closed our Series A funding with a distinguished group of existing and new investors,” continues Bardia Pezeshki. “And we will use the new funds to scale our team and build initial products for our growing family of partners and customers.”
About the Technology
Today’s high-performance ICs use SerDes-based electrical links to achieve adequate IO density. However, the power consumption and bandwidth density of these electrical links degrade quickly with length. Conventional optical communications technologies developed for networking applications have been impractical for inter-processor and processor-memory interconnects due to their low bandwidth density, high power consumption, and high cost. Moreover, co-packaging existing laser sources with hot ASICs does not fit well for reliability reasons unless external laser sources (ELS) are used which increases complexity and cost.
“All of this is now changing,” says Bardia Pezeshki. “We are developing ultra-low power, high-density optical transceivers based on microLED arrays. These innovative devices leverage recent display industry advances and would have been impractical just a few years ago. Our optimized links support up to 14Gbps per lane over -40°C to +125°C temperature with excellent reliability. A LightBundle interconnect uses hundreds of parallel optical lanes connecting a microLED-based optical transmitter array to a simple CMOS-based optical receiver array over multi-core fiber cables to create low-cost multi-Tbps interconnects with up to 10 meter reach.”
The parallel nature of LightBundleTM is well-matched to parallel chiplet interfaces like UCIe, OpenHBI, and BoW, and can also be used to extend the reach of existing compute interconnects like PCIe/CXL, and HBM/DDR/GDDR memory links, as well as various inter-processor interconnects like NVLink with low power and low latency.
Avicena at ECOC 2022:
In addition to showing the LightBundleTM technology at the ECOC exhibits (booth #464) Avicena will also present at the following event:
Session Time: September 20, 2022, 5:30 – 7:00pm
Session Title: Workshop on Photonic Startups & Entrepreneurship
Dr. Bardia Pezeshki will participate on the panel and give an invited talk on:
The challenges and pitfalls of VC funded optical start-ups – a view from the Man in the Arena
About Avicena
Avicena is a privately held company located in Mountain-View, CA, developing ultra-low energy optical links based on microLEDs. These interconnects offer class-leading bandwidth density and energy efficiency for medium reach. Applications include chip-to-chip interconnects in HPC, AI/ML, and memory disaggregation, as well as next generation links in sensors, 5G wireless and aerospace. Avicena’s technology is a key building block in the evolution of new networking and computing architectures that will reduce the energy impact on our planet.
Contacts
Avicena Media Contact:
Sama Pourmojib
email: sama@avicena.tech